The software application published by Aldec that includes the feature or module named `RIVIERA_VERILOG_SIMULATION_2021.0331` is **Riviera-PRO**. Riviera-PRO is a comprehensive simulation and verification environment for digital designs, specifically tailored for SystemVerilog, Verilog, VHDL, and other hardware description languages.
The component `RIVIERA_VERILOG_SIMULATION_2021.0331` likely refers to a specific version or build of the Verilog