The software application published by Aldec that includes a feature or module called **RIVIERA_VHDL_DSE** is **RIVIERA-PRO**. RIVIERA-PRO is a comprehensive simulation and verification tool for digital designs, capable of handling VHDL, Verilog, SystemVerilog, and mixed-language simulations.
**RIVIERA_VHDL_DSE** stands for **RIVIERA VHDL Design Space Exploration**. This module is used for enhancing the design and verification process by allowing