The software application published by Aldec that includes the feature/module/file called 'RIVIERA_VHDL_SIMULATION_LV' is **RIVIERA-PRO**. RIVIERA-PRO is a VHDL and SystemVerilog simulation and debugging tool used in electronic design automation (EDA) for simulating complex digital designs.
**RIVIERA_VHDL_SIMULATION_LV** likely refers to the specific component or module within the RIVIERA-PRO environment that deals with VHDL simulation at a low